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I'm exploring the arm<->fpga interaction and development a bit deeper. I'm comparing the way iclass and iso14443a differs (and they are pretty similar).
But what does this block of code do? Specifically, casting a uint8_t (b) to void in a statement - what is the effect of that?
iclass.c:
uint8_t b = 0;
[...]
if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
(void)b;
}
iso14443a.c:
static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, bool correctionNeeded)
{
uint8_t b;
[...]
// clear receiving shift register and holding register
while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
b = AT91C_BASE_SSC->SSC_RHR; (void) b;
while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
b = AT91C_BASE_SSC->SSC_RHR; (void) b;
And in the later case, b isn't even declared volatile. Isn't that statement optimized removed by the compiler?
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nvm, i read it wrong.
It looks like some dirty way to clear the content in RHR.
Last edited by Enio (2014-05-05 10:08:23)
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It looks like some dirty way to clear RHR, yes, but that is a very strange syntactic construction. I don't understand how a cast from uint8_t to void can produce any meaningful effect at all ?
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The Read on RHR clears RXREADY. So the intention is to empty a full RHR by reading it into that uint8t var. Cast to void -> Compiler then knows you intentionally dont use the variable (prevents warnings).
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Enio is right.
And regarding the statement being removed by the compiler: it isn't because AT91C_BASE_SSC->SSC_SR (like all ARM registers) is declared volatile.
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